Senior FPGA Engineer

About the role

We are a Belgian engineering consulting firm supporting SMEs and large industrial organisations in turning innovation and R&D concepts into reality. We seek a Senior FPGA Engineer to own gateware architecture, shape designs from system requirements, and mentor the engineering team.

Key responsibilities

• Define and own FPGA architecture, make key trade‑off decisions and ensure high‑quality RTL implementation.
• Design, simulate, integrate and test RTL (VHDL/Verilog/SystemC) while reviewing peers’ code.
• Drive verification strategy, including testbenches, on‑target tests and CI pipelines.
• Write and test software drivers and support embedded‑Linux, FreeRTOS and C/Python test frameworks.
• Mentor junior and mid‑level engineers and lead small FPGA teams on complex units.
• Collaborate with PCB designers, RF, optical and network engineers to translate system intent into gateware.

Required profile

• 5‑10 years of professional FPGA/RTL design experience, taking designs from requirements to validated hardware.
• Master’s or PhD in Computer, Electronics, Mechatronics or equivalent experience.
• Strong command of VHDL (preferred), Verilog, SystemC/SystemVerilog and proficiency in C and Python.
• Deep understanding of the full FPGA design flow, synthesis, place‑and‑route and timing closure.
• Excellent communication skills in English and comfort working in a lab environment.

Required skills

• VHDL, Verilog, SystemC, SystemVerilog
• C, Python
• Questasim, Makefile, TCL
• Gitlab, Docker, CI/CD pipelines
• Digital signal and image processing
• Embedded Linux, FreeRTOS
• PCIe, high‑speed transceivers, DDR3/4/5 interfaces
• PCB and hardware design basics

What we offer

• Consultant position with a balanced salary package and fringe benefits.
• Training, coaching and close follow‑up for professional development.
• Human‑centred, diverse workplace that supports physical and mental well‑being.